As someone whose last PC purchase is 3 years back and is considering a new PC within the next 12 months, can someone enlighten me what the difference is between dual processor, which is what I had in mind buying, and dual/quad core architecture (performance wise) ?
Seems like any computer you buy today has dual core cpus in them. Heck, even my laptop has a Centrino Duo cpu and 2gb memory in it
So, where do I get the most bang for my buck architecture wise, 2 cpus or multiple cores ? Will my old OS (Windows XP pro SR1) still run on say a quad core architecture ? Other pitfalls ? Should I wait more than 12 months before buying a new one
A "core" is essentially a full processor. Before the advent of multi-cores, if you wanted to have multiple processors in your system, one of the most popular options was Symmetric Multi-Processing (SMP), where you buy a motherboard with multiple sockets
into which you can plug multiple physical chips, with each chip containing one processor and some cache memory. The chips would be connected to main memory via a system bus. Unfortunately, such configurations were primarily reserved for servers, and both multiple-socket motherboards as well as SMP-capable processors were (and still are) quite expensive.
Today's "multi-core" chips (formally called Chip Multi-Processors or CMP's) contain multiple processors (or "cores") and cache memories inside a single chip. The primary advantage to the end-user such as you and I is cost and simplicity. With a single-socket motherboard and at the price point of a single-chip system, you can get the performance of an SMP system. High-throughput servers can use CMP's with multi-socketed motherboards to create "SMP-of-CMP" systems.
As far as the Operating System and application softwares are concerned, there is very little difference between a dual-processor CMP ("dual-core") and a dual-processor SMP. There are performance issues, however.
- Communication Latency: On an SMP, the processors are physically separated over a large distance. On a CMP, they are much closer together, so communication latencies are much lower. However, Intel's original CMP implentations (Pentium D) were extremely hacked-up. Inter-processor communication first had to go off the chip, get onto the system bus and then re-enter the chip into the other core. This offset pretty much all of the performance benefits of a CMP. In fact, the second iteration of the Pentium D (Presler) was not a CMP at all - it was actually a multi-chip module (MCM): 2 distinct chips crammed into a single package and made to fit into a single Socket.
- Bandwidth: On a CMP, both cores have to share the same set of pins to get data on and off the chip to/from main memory. This could be devastating for bandwidth-intensive applications. In practice, there's not much of a difference between bandwidth contention of a CMP and an SMP on an antiquated Intel-style "shared-bus" platform, where both processors need to get onto the same bus to get to main memory regardless of whether they are on the same chip (CMP) or on multiple chips (SMP). AMD's Hyper Transport, however, is an entirely different animal. Multiple chips on an SMP will have access to a lot more bandwidth than multiple cores on a CMP. With both Intel and AMD planning to introduce Quad-Cores, my spider-sense tells me that bandwidth contention is likely to be a huge performance issue that is going to limit the peak performance of these systems.
- Cache Sharing: Local on-chip cache memory can be shared between the multiple cores of a CMP. This is extremely beneficial if the applications running on the different cores have different cache space requirements. This is impossible on an SMP. Unfortunately, this is also not exploited on either the Pentium D or the Athlon64 X2. The on-chip L2 caches are hard-partitioned between the two cores on both these processors. Conroe and Merom are the first CMPs to feature shared L2 caches, and this should have a significant impact on performance for some applications.
I believe that both AMD's HyperTransport as well as Intel's brain-damaged FSB have sufficient bandwidth to support dual cores. With 4 cores on a single chip, I'm not so sure. Intel's blazing Conroes will without doubt be gasping for data in quad-core form, unless you are dealing with an excellently-written application that manages to restrict a large part of its communication within the chip. AMD's platform probably has more room to play with, but the beauty of HyperTransport is lies in its scalability with multiple sockets, so if you have plenty of cash and want a lot of processors, it is better to go with more sockets than more cores-in-a-socket.
Edited by angshuman, 09 August 2006 - 07:56 PM.